A typical MOS transistor, as indicated by reference numeral 100 in FIG. 1, includes a drain region 102, and a source region 104, formed in a substrate 106, and separated by a channel region 108. A metal gate 110 serves as the controlling electrode. For ease of description, the metal contacts to the drain region 102 and source region 104, have not been shown, but would serve to provide electrical contact with the drain and source regions, in a manner commonly known in the art. It will be appreciated that the drain 102 is oppositely doped to the substrate 106 and that a reverse biased p-n junction exists between the drain region 102 and substrate 106, which accounts for a substantial amount of drain capacitance.
It will be appreciated that this parasitic capacitance has a significant effect on fMax (the maximum frequency at which the device can practically be operated) and fT (the cut-off frequency where voltage gain is unity). It would therefore be desirable to be able to increase fMax and fT for high speed applications.